LDRA announced that the LDRA tool suite now supports the hardware-based, multicore mitigation capabilities of RISC-V ...

You will not get the automatic speedup for your software when you upgrade to a new computer, since the frequency scaling is virtually stopped, and you only get more ...

AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, “C” ...

The SiFive U54-MC Standard Core is the world's first RISC-V application processor, capable of supporting full-featured operating systems such as Linux. The U54-MC has 4x 64-bit U5 cores and 1x 64-bit ...

Developers can now access and optimize performance across RISC-V-based multicore systems, including analyzing the impact of shared resources and data coherency on worst-case execution time (WCET).

The European Aviation Safety Agency (EASA) and the Federal Aviation Administration (FAA) are to issue further guidance on the certification of airborne systems with avionics multicore processors ...

Slowly but surely, RISC-V, the Open Source architecture for everything from microcontrollers to server CPUs is making inroads in the community. Now SiFive, the major company behind putting RISC-V ...

A new technical paper titled “A RISC-V Multicore and GPU SoC Platform with a Qualifiable Software Stack for Safety Critical ...

An increasing number of multi-threaded embedded applications want to leverage multicore designs. Symmetric Multiprocessing (SMP) RTOS provides automatic load balancing of multiple threads in a ...